The SNIA SSSI in the news.
SNIA technical work and education advances will play a prominent role in the program at the 2019 Flash Memory Summit, August 5-8, 2019, in Santa Clara, CA. Over 40 speakers will present on key standards activities and education initiatives, including the first ever FMS Persistent Memory Hackathon hosted by SNIA. Check out your favorite technology (or all), and learn what SNIA is doing in these sessions:
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Registration is now open for the upcoming Persistent Programming in Real Life (PIRL) Conference – July 22-23, 2019 on the campus of the University of California San Diego (UCSD).
The 2019 PIRL event features a collaboration between UCSD Computer Science and Engineering, the Non-Volatile Systems Laboratory, and the SNIA to bring industry leaders in programming and developing persistent memory applications together for a two-day discussion on their experiences.
Read MoreWe hope you had time to check out our recent webcast on Applications Take Advantage of Persistent Memory. Raghu Kulkarni of Viking Technology, a member of the SNIA Solid State Storage Initiative, did a great job laying the foundation for an understanding of Persistent Memory today, just in time for the SNIA Persistent Memory Summit.
You can catch up on videos of Summit talks, along with the slides presented, here.
During the webcast, we had many interesting questions. Now, as promised, Raghu provides the answers. Happy reading, and we hope to see you at one of our upcoming webcasts or events.
Q. Does NVDIMM-N encryption lower the performance levels that you presented?
A. It typically depends on the implementation and differs from each vendor. Generally speaking, Save and Restore operations will increase by a small factor – less than 10%. Products from some vendors, like Viking, will not see a performance degradation as it is offset by a faster transfer rate
Q. What are the read/write bandwidth capabilities of NVDIMM-N? How does that compare to Intel’s Persistent Memory?
A. For Byte-addressable mode, NVDIMM-N in theory has the same high performance as DRAM, around 100ns. With the latest Linux drivers in DAX mode, NVDIMM-N are still expected to be better than Intel’s Persistent Memory.
Q. On the use cases, what are the use cases when Persistent Memory is attached to an accelerator chip compared to a Processor attached setup?
A. Mainly to accelerate the performance by storing the metadata or even data in Persistent Memory, so that the request can be acknowledged immediately without having to wait for commits to SSD/HDD. It also saves the rebuild time, which is a common practice for volatile memory.
Q. How does BIOS/MRC work when a Persistent Memory is attached to an accelerator (ASIC/FPGA/GPU) over PCIe, when trying to extended/increase the memory for the processor?
A. System BIOS will not detect the Persistent Memory sitting on PCIe; it only discovers Persistent Memory installed in DIMM slots. FPGA/ASIC, etc. have to build their own bottom up code to detect and present the Persistent Memory on PCIe depending on the use case.
Q. Do we need application changes to take advantage of Persistent Memory-aware file storage? how does it compare against the DAX mode?
A. To take advantage of the low latency/high performance nature of Persistent Memory, it would be beneficial to modify the applications. However, one can still leverage the existing IO stack if modifying the application is not an option. Check out pmem.io for pre-built libraries that can be directly integrated into applications.
Q. Should the Persistent Memory usage be compared against the Storage or Memory. Which is a more relevant use case for Persistent Memory?
A. Typically, a media that is Byte-addressable is called Persistent Memory (PM); however, you can also access it in Block mode. Again, depending on the application needs, use case, and other system level factors it can be used in either modes. However, you will find best performance when accessing in Byte-addressable/Load-Store mode.
It’s now less than three weeks for the next SNIA Persistent Memory Hackathon and Workshop. Our next workshop will be held in conjunction with the 10th Annual Non-
Volatile Memory Workshop (http://nvmw.ucsd.edu/) at the University of California, San Diego on Sunday, March 10th from 2:00pm to 5:30pm.
The Hackathon at NVMW19 provides software developers with an understanding of the different tiers and modes of persistent memory, and gives an overview of the standard software libraries that are available to access persistent memory. Attendees will have access to system configured with persistent memory, software libraries, and sample source code. A variety of mentors will be available to provide tutorials and guide participants in the development of code. Learn more here.
In the last workshop, the feedback from the attendees pointed to a desire to work longer on code after the tutorial ended. We will ensure that all the Hackathon attendees will have access to their environment through the length of the conference. So any participant in the Sunday session will be able to continue work until the conference completion on Tuesday afternoon.
While there won’t be an opportunity for formal follow-up, we’re planning an informal meet-up the final day of the conference. Stay tuned for details.
For those not familiar with NVMW, the program is replete with the latest in non-volatile memory research, which enables attendees to understand the practical advances in software development for persistence. The workshop facilitates the exchange of ideas and advances collaboration and knowledge of the use of persistent memory. Registration for the conference is affordable, and grants are available for university student attendees.
For those not able to get to San Diego in March, enjoy the weather that obviously won’t be anywhere near as nice where you live. Oh, sorry. For those not able to get to San Diego in March, SNIA is working on the next opportunities for a formal hackathon. But we can’t do it alone. If you have a group of programmers interested in learning persistent memory development, SNIA would consider coming to you with a Host a Hackathon. We can provide, or even train, mentors to get you started, and show you how to build your own cloud-based development environment. You’ll get an introduction to coding, and you’ll be left with some great examples to build your own applications. Contact SNIA at PMhackathon@snia.org for more details and visit our PM Programming Hackathon webpage for the latest updates.
Leave it to Rob Peglar, SNIA Board Member and the MC of SNIA’s 7th annual Persistent Memory Summit to capture the Summit day as persistently fun with a metric boatload of great presentations and speakers! And indeed it was a great day, with fourteen sessions presented by 23 speakers covering the breadth of where PM is in 2019 – real world, application-focused, and supported by multiple operating systems. Find a great recap on the Forbes blog by Tom Coughlin of Coughlin Associates.
Attendees enjoyed live demos of Persistent Memory technologies from AgigA Tech, Intel, 
SMART Modular, the SNIA Solid State Storage Initiative, and Xilinx. Learn more about what they presented here.
And for the first time as a part of the Persistent Memory Summit, SNIA hosted a Persistent Memory Programming Hackathon sponsored by Google Cloud, where SNIA PM experts 
mentored software developers to do live coding to understand the various tiers and modes of PM and what existing methods are available to access them. Upcoming SNIA SSSI on Solid State Storage blogs will give details and insights into “PM Hacking”. Also sign up for the SNIAMatters monthly newsletter to learn more, and stay tuned for upcoming Hackathons – next one is March 10-11 in San Diego.
Missed out on the live sessions? Not to worry, each session was videotaped and can be found on the SNIA Youtube Channel. Download the slides for each session on the PM Summit agenda at www.snia.org/pm-summit. Thanks to our presenters from Advanced Computation and Storage, Arm, Avalanche Technology, Calypso Systems, Coughlin Associates, Dell, Everspin Technologies, In-Cog Solutions, Intel, Mellanox Technologies, MemVerge, Microsoft, Objective Analysis, Sony Semiconductor Solutions Corporation, Tencent Cloud, Western Digital, and Xilinx. And thanks also to our great audience and their questions – your enthusiasm and support will keep us persistently having even more fun!
SNIA 7th annual Persistent Memory Summit – January 24, 2019 at the Hyatt Santa Clara CA – delivers a far-reaching agenda exploring exciting new topics with experienced speakers:
And much more! Full agenda and speaker bios at http://www.snia.org/pm-summit.
Registration is complimentary and includes the opportunity to tour demonstrations of persistent memory applications available today from SNIA Persistent Memory and NVDIMM SIG, SMART Modular, AgigA Tech, and Viking Technology over lunch, at breaks, and during the evening Networking Reception. Additional sponsorship opportunities are available to SNIA and non-SNIA member companies – learn more.
New Companion Event to the Summit –
Persistent Memory Programming Hackathon
Wednesday January 23, 2019 9:00 am – 2:00 pm
Join us for the inaugural PM Programming Hackathon on the day before the Summit –a half-day program designed to get software developers an understanding of the various tiers and modes of Persistent Memory and what existing methods are available to access them. Learn more and register at https://www.snia.org/pm-summit/hackathon
With a topic like Emerging Memory Poised to Explode, no wonder this SNIA Solid State Storage Initiative webcast generated so much interest! 
Our audience had some great questions, and, as promised, our experts Tom Coughlin and Jim Handy provide the answers in this blog. Read on, and join SNIA at the Persistent Memory Summit January 24, 2019 in Santa Clara CA. Details and complimentary registration are at www.snia.org/pm-summit.
Q. Can you mention one or two key applications leading the effort to leverage Persistent Memory?
A. Right now the main applications for Persistent Memory are in Storage Area Networks (SANs), where NVDIMM-Ns (Non-Volatile Dual In-line Memory Modules) are being used for journaling. SAP HANA, SQLserver, Apache Ignite, Oracle RDBMS, eXtremeDB, Aerospike, and other in-memory databases are undergoing early deployment with NVDIMM-N and with Intel’s Optane DIMMs in hyperscale datacenters. IBM is using Everspin Magnetoresistive Random-Access Memory (MRAM) chips for higher-speed functions (write cache, data buffer, streams, journaling, and logs) in certain Solid State Drives (SSDs), following a lead taken by Mangstor. Everspin’s STT MRAM DIMM is also seeing some success, but the company’s not disclosing a lot of specifics.
Q. I believe that anyone who can ditch the batteries for NVDIMM support will happily pay a mark-up on 3DXP DIMMs should Micron offer them.
A: Perhaps that’s true. I think that Micron, though, is looking for higher-volume applications. Micron is well aware of the size of the NVDIMM-N market, since the company is an important NVDIMM supplier. Everspin is probably also working on this opportunity, since its STT MRAM DIMM is similar, although at a significantly higher price than Dynamic Random Access Memory (DRAM).
Volume is the key to more applications for 3DXPoint DIMMs and any other memory technology. It may be that the rise of Artificial Intelligence (AI) applications will help drive the greater use of many of these fast Non-Volatile Memories.
Q. Any comments on HPE’s Memristor?
A: HPE went very silent on the Memristor at about the same time that the 3D XPoint Memory was introduced. The company explained in 2016 that the first generation of “The Machine” would use DRAM instead of the Memristor. This leads us to suspect that 3D XPoint turned some heads at HPE. One likely explanation is that HPE by itself would have a very difficult time reaching the scale required to bring the Memristor’s cost to the necessary level to justify its use.
Q. Do you expect NVDIMM-N will co-exist into the future with other storage class memories because of its speed and essentially unlimited endurance of DRAM?
A: Yes. The NVDIMM-N should continue to appeal to certain applications, especially those that value its technical attributes enough to offset its higher-than-DRAM price.
Q. What are Write/Erase endurance limitations of PCM and STT? (vis a vis DRAM’s infinite endurance)?
A: Intel and Micron have never publicly disclosed their endurance figures for 3D XPoint, although Jim Handy has backed out numbers in his Memory Guy blog (http://TheMemoryGuy.com/examining-3d-xpoints-1000-times-endurance-benefit/). His calculations indicate an endurance of more than 30K erase/write cycles, but the number could be significantly lower than this since SSD controllers do a good job of reducing the number of writes that the memory chip actually sees. There’s an SSD guy series on this: http://thessdguy.com/how-controllers-maximize-ssd-life/, also available as a SNIA SSSI TechNote. Everspin’s EMD3D256M STT MRAM specification lists an endurance of 10^10 cycles.
Q. Your thoughts on Nanotube RAM (NRAM)?
A: Although the nanotube memory is very interesting it is only one member in a sea of contenders for the Persistent Memory crown. It’s very difficult to project the outcome of a device that’s not already in volume production.
Q. Will Micron commercialize 3D XPoint? I do not see them in the market as much as Intel on Optane.
A: Micron needs a clear path to profitability to rationalize entering the 3D XPoint market whereas Intel can justify losing money on the technology. Learn why in an upcoming post on The Memory Guy blog.
Thanks again to the bearded duo and their moderator, Alex McDonald, SNIA Solid State Storage Initiative Co-Chair! Bookmark the SNIA Brighttalk webcast link for more great webcasts in 2019!
Don’t miss your chance to attend the SNIA’s 7th Annual Persistent Memory Summit, co-located with the SNIA Annual Members’ Meeting on January 24, 2019 at a new location – Hyatt Regency Santa Clara CA. This innovative one-day event brings together industry leaders, solution providers, and users of technology to understand the ecosystem driving system memory and storage into a single, unified “persistent memory” entity. Agenda topics include Enabling Persistent Memory through the Operating System and Interpreted Languages; PM Solutions, Interfaces, and Media; and the NVM Programming Model in the Real World. The final agenda will be live later this month so stay tuned!
Many thanks to SNIA member Intel Corporation and the SNIA Solid State Storage Initiative for underwriting the Summit. New to the Summit in 2019 is an evening networking reception and a new, expanded demonstration area. Gold and Demonstration sponsor opportunities are now available. Complimentary registration is now open – visit www.snia.org/pm-summit to sign up, check out videos of 2018 sessions, and learn how to showcase your PM solutions at the event.
SNIA thanks and celebrates the many hardworking SNIA member volunteers whose technical work was awarded Best of Show at the recent Flash Memory Summit.
SNIA won the FMS Most Innovative Flash Memory Technology Award, recognizing innovations that will change the way flash memory works and is used in products, for the SNIA Technical Position Real World Storage Workloads Performance Test Specification (RWSW PTS), developed by the SNIA Solid State Storage Technical Work Group (SSS TWG). “Real World Workloads are important for Data Center, IT, and Storage professionals,” said Eden Kim, Chair of the SSS TWG, and CEO of SNIA member company Calypso Systems “because real world workloads are very different from synthetic lab workloads and are key determinants in datacenter server and storage performance, optimization and qualification.” Eden and Jennifer Dietz of SNIA member company Intel and Co-Chair of the SNIA Solid State Storage Initiative Marketing Committee accepted the award from Jay Kramer of Flash Memory Summit.
SNIA also won the FMS Best of Show Technology Innovation Award, recognizing that cloud and other large data centers typically prioritize their selection criteria for storage solutions as those that can achieve the highest possible performance while avoiding proprietary vendor lock-in. SNIA and EXTEN HyperDynamic™ NVMe over Fabrics high-performance storage software were recognized for creating an open storage management specification that works with EXTEN storage software for being the first in the industry to provide a solution based on SNIA Swordfish™ and DMTF Redfish® specifications. “We congratulate EXTEN Technologies for its innovation and well-deserved accolade,” said Don Deel, SNIA Storage Management Initiative Governing Board Chair. “By integrating SNIA Swordfish into its solution, EXTEN Technologies’ customers will benefit from a standards-based API that does not require learning the intricacies of storage infrastructure to handle day-to-day storage needs.” Accepting the award for SNIA at FMS were Mark Carlson of SNIA member company Toshiba Memory Systems and Bill Miller of SNIA member company Samsung Electronics, Co-Chairs of the SNIA Technical Council.
Congratulations to all the SNIA volunteers who participated in the development of these award-winning specifications.
SNIA Sessions at FMS Now Available for Viewing and Download
Also at Flash Memory Summit, SNIA work and volunteers were on display in sessions on persistent memory (PM), solid state storage, form factors, and testing. A two-day PM track featured talks on advances in PM, PM hardware, PM software and applications, and remote persistent memory (PMEM-101-1; PMEM -102-1; PMEM-201-1; and PMEM-202-1).
SNIA is now partnering with the Enterprise and Datacenter SSD Form Factor Working Group (EDSFF) on form factors and a Wednesday session outlined their advances (SSD-201-1). SNIA also presented a preconference seminar (G) on bringing your SSD testing up to date, and a SNIA Education afternoon with sessions on flash storage, programming and networking, buffers, queues, and caches; and a BoF on PM futures. Check out all these sessions and more on the Flash Memory Summit proceedings page.
SNIA Executive Director Michael Oros shared SNIA strategic directions and areas of focus in a FMS main stage presentation, available here.
SNIA also presented updates on their work in Persistent Memory, Solid State Storage, and alliances at a well-attended reception on Monday evening. The SSSI honored Doug Voigt, co-chair of the NVM Programming Technical Work Group, for his contributions to SNIA and the NVM Programming Model.
We continued our discussions on the exhibit floor featuring JEDEC-compliant NVDIMM-Ns from SNIA Persistent Memory and NVDIMM SIG members AgigA Tech, Micron, Netlist, SMART Modular Technologies, and Viking in a Supermicro box running an open source performance demonstration. If you missed it, the SIG will showcase a similar demonstration at the upcoming SNIA Storage Developer Conference September 24-27, 2018, and the SNIA Persistent Memory Summit January 24, 2019 at the Hyatt Santa Clara. Register now for both events!
By Paul Grun, Chair, OpenFabrics Alliance and Senior Technologist, Cray, Inc.
Remote Persistent Memory, (RPM), is rapidly emerging as an important new technology. But understanding a new technology, and grasping its significance, requires engagement across a wide range of industry organizations, companies, and individuals. It takes a village, as they say.
Technologies that are capable of bending the arc of server architecture come along only rarely. It’s sometimes hard to see one coming because it can be tough to discern between a shiny new thing, an insignificant evolution in a minor technology, and a serious contender for the Technical Disrupter of the Year award. Remote Persistent Memory is one such technology, the ultimate impact of which is only now coming into view. Two relatively recent technologies serve to illustrate the point: The emergence of dedicated, high performance networks beginning in the early 2000s and more recently the arrival of non-volatile memory technologies, both of which are leaving a significant mark on the evolution of computer systems. But what happens when those two technologies are combined to deliver access to persistent memory over a fabric? It seems likely that such a development will positively impact the well-understood memory hierarchies that are the basis of all computer systems today. And that, in turn, could cause system architects and application programmers to re-think the way that information is accessed, shared, and stored. To help us bring the subject of RPM into sharp focus, there is currently a concerted effort underway to put some clear definition around what is shaping up to be a significant disrupter.
For those who aren’t familiar, Remote Persistent Memory refers to a persistent memory service that is accessed over a fabric or network. It may be a service shared among multiple users, or dedicated to one user or application. It’s distinguished from local Persistent Memory, which refers to a memory device attached locally to the processor via a memory or I/O bus, in that RPM is accessed via a high performance switched fabric. For our purposes, we’ll further refine our discussion to local fabrics, neglecting any discussion of accessing memory over the wide area.
Most important of all, Persistent Memory, including RPM, is definitely distinct from storage, whether that is file, object or block storage. That’s why we label this as a ‘memory’ service – to distinguish it from storage. The key distinction is that the consumer of the service recognizes and uses it as it would any other level in the memory hierarchy. Even though the service could be implemented using block or file-oriented non-volatile memory devices, the key is in the way that an application accesses and uses the service. This isn’t faster or better storage, it’s a whole different kettle of fish.
So how do we go about discovering the ultimate value of a new technology like RPM? So far, a lively discussion has been taking place across multiple venues and industry events. These aren’t ad hoc discussions nor are they tightly scripted events; they are taking place in a loosely organized fashion designed to encourage lots of participation and keep the ball moving forward. Key discussions on the topic have hopscotched from the SNIA’s Storage Developers Conference, to SNIA/SSSI’s Persistent Memory Summit, to the OpenFabrics Alliance (OFA) Workshop and others. Each of these industry events has given us an opportunity for the community at large to discuss and develop the essential ideas surrounding RPM. The next installment will occur at the upcoming Flash Memory Summit in August where there will be four sessions all devoted to discussing Remote Persistent Memory.
Having frequent industry gatherings is a good thing, naturally, but that by itself doesn’t answer the question of how we go about progressing a discussion of Remote Persistent Memory in an orderly way. A pretty clear consensus has emerged that RPM represents a new layer in the memory hierarchy and therefore the best way to approach it is to take a top-down perspective. That means starting with an examination of the various ways that an application could leverage this new player in the memory hierarchy. The idea is to identify and explore several key use cases. Of course, the technology is in its early infancy, so we’re relying on the best instincts of the industry at large to guide the discussion.
Once there is a clear idea of the ways that RPM could be applied to improve application performance, efficiency or resiliency, it’ll be time to describe how the features of an RPM service are exposed to an application. That means taking a hard look at network APIs to be sure they export the functions and features that applications will need to access the service. The API is key, because it defines the ways that an application actually accesses a new network service. Keep in mind that such a service may or may not be a natural fit to existing applications; in some cases, it will fit naturally meaning that an existing application can easily begin to utilize the service to improve performance or efficiency. For other applications, more work will be needed to fully exploit the new service.
Notice that the development of the API is being driven from the top down by application requirements. This is a clear break from traditional network design, where the underlying network and its associated API are defined roughly in tandem. Contrast that to the approach being taken with RPM, where the set of desired network characteristics is described in terms of how an application will actually use the network. Interesting!
Armed with a clear sense of how an application might use Remote Persistent Memory and the APIs needed to access it, now’s the time for network architects and protocol designers to deliver enhanced network protocols and semantics that are best able to deliver the features defined by the new network APIs. And it’s time for hardware and software designers to get to work implementing the service and integrating it into server systems.
With all that in mind, here’s the current state of affairs for those who may be interested in participating. SNIA, through its NVM Programming Technical Working Group, has published a public document describing one very important use case for RPM – High Availability. The document describes the requirements that the SNIA NVM Programming Model – first released in December 2013 — might place on a high-speed network. That document is available online. In keeping with the ‘top-down’ theme, SNIA’s work begins with an examination of the programming models that might leverage a Remote Persistent Memory service, and then explores the resulting impacts on network design. It is being used today to describe enhancements to existing APIs including both the Verbs API and the libfabric API.
In addition, SNIA and the OFA have established a collaboration to explore other use cases, with the idea that those use cases will drive additional API enhancements. That collaboration is just now 
getting underway and is taking place during open, bi-weekly meetings of the OFA’s OpenFabrics Interfaces Working Group (OFIWG). There is also a mailing list dedicated to the topic to which you can subscribe by going to www.lists.openfabrics.org and subscribing to the Ofa_remotepm mailing list.
And finally, we’ll be discussing the topic at the upcoming Flash Memory Summit, August 7-9, 2018. Just go to the program section and click on the Persistent Memory major topic, and you’ll find a link to PMEM-202-1: Remote Persistent Memory.
See you in Santa Clara!